The PDP-11 FAQ ------------------oOo---------------------- Editor/Maintainer: Mike McCrohan FTP Location: anon-ftp ftp.village.org in pub/pdp-11/faq FTP Maintainer Dieter "Dworkin" Muller Revision History: May 1994 Added section on the Maintenance Panel Updated the Operating Systems. Added Mark Crispins 1986 list of PDP's Appendix A: Related FAQ Sites 11/44 update Added to PRO, PDT sections Feb 1994 Added some detail to the PDT section Jan 1994 Current version - Now available via FTP Aug 1993 Original version New in this update: (... ....1994) (Marked with "|") For the future: rewrite the 11/45, /55, /70 section as it is getting fragmented... **Note** The word "I" appears at a number of places throughout the text. It does not always refer to the FAQ maintainer, but is often the writing of one of the other contributors. Perhaps one of these days we will organise an overall rewrite of the FAQ to make it slightly less disjointed. Maybe when I get a Round Tuit. :-) Introduction ============ The PDP-11 was, and is an extremely successful and influential family of machines which was spanned two decades from the early 1970s to the early/mid 1990s. This note is an attempt to gather some of the knowledge on this family and present it for the benefit of those who are enthusiasts, curious, or downright confused as to what the -11 was and is, and how it related to its world. The information presented is compiled from the memory and notebooks of both myself and a number of people who have filled in the many gaps in my memory or set me straight on certain details. Feel free to mail me at mike.mccrohan@iol.ie with any data you feel should be included, corrected or updated. Contents ---------------------- What is a PDP? What is a PDP-11? What different PDP-11 models were made? Other fun PDP11's. The Never 11's PDP-11 Relative Performance What operating systems were written for the PDP-11? What programming languages are supported on the PDP-11? Memory address convention (for this FAQ), and the GPRs What is the PDP-11 instruction set? [New] The PDP-11 Maintenance Panel and front panel Trivia/Humour/Stories Who's Who? [New] Mark Crispins 1986 list of PDP's [New] Appendix A: Related FAQ Sites What is a PDP? [Extracted from the PDP-8 FAQ By Doug Jones. =============== Used with his permission] Digital Equipment Corporation (DEC) was founded in 1957, with facilities in an old woolen mill in Maynard Massachusetts; at first, they sold transistorized "systems modules", plug-in circuit boards with a few transistorized logic gates per board. Starting in 1960, though, DEC began to experiment with selling computers; by 1961, they had sold enough that DECUS, the Digital Equipment Computer User's Society was founded. DEC's first computer, the PDP-1, sold for only $120,000 at a time when other computers sold for over $1,000,000. Everyone (the government and DEC's stockholders included) knew that computers were big and expensive and needed a computer center and a large staff; DEC chose to avoid dealing with these stereotypes by entirely avoiding the term "computer"; thus, for over a decade, all digital computers sold by DEC were called Programmed Data Processors (PDPs). In early DEC documentation, plural form "PDPs" is used as a generic term for all DEC computers. [Ken Olsen claimed that the board of directors would not let him call the machines computers because some contemporary study had predicted that the world market for computers would be very small - less than 100 if memory serves. They were mollified with Programmed Data Processor, however, and PDP lives to this day. -MMcC] DEC built a number of different computers under the PDP label, with a huge range of price and performance. The largest of these are fully worthy of large computer centers with big support staffs. Many early DEC computers were not really built by DEC. With the PDP-3 and LINC, for example, customers built the machines using DEC parts and facilities. Here is the list of PDP computers: MODEL DATE PRICE BITS COMMENTS ===== ==== ======== ==== ===== PDP-1 1960 $120,000 18 DEC's first computer PDP-2 NA 24 Never built? PDP-3 36 One was built by a customer, not by DEC. PDP-4 1962 18 Predecessor of the PDP-7. PDP-5 1963 $27,000 12 The ancestor of the PDP-8. PDP-6 1964 $120,000 36 A big computer; 23 built, most for MIT. PDP-7 1965 ~$60,000 18 Widely used for real-time control. PDP-8 1965 $18,500 12 The smallest and least expensive PDP. PDP-9 1966 $35,000 18 An upgrade of the PDP-7. PDP-10 1967 $186,500 36 A PDP-6 successor, great for timesharing. PDP-11 1970 $10,800 16 DEC's first and only 16 bit computer. PDP-12 1969 $27,900 12 A PDP-8 relative. PDP-13 NA Bad luck, there was no such machine. PDP-14 A ROM-based programmable controller. PDP-15 1970 $16,500 18 A TTL upgrade of the PDP-9. PDP-16 1972 $.8-$4,000 NA 8/16 A register-transfer module system. Corrections and additions to this list are welcome! The prices given are for minimal systems in the year the machine was first introduced. The bits column indicates the word size. Note that the DEC PDP-10 became the DECSYSTEM-20 as a result of marketing considerations, and DEC's VAX series of began as the Virtual Address eXtension of the never-produced PDP-11/78. It is worth mentioning that it is generally accepted that the Data General Nova was originally developed as the PDP-X, a 16-bit multi-register version of the PDP-8. A prototype PDP-X was built at DEC before the design was rejected. This and a competing 16-bit design were apparently submitted to Harold McFarland at Carnegie-Mellon University for evaluation; McFarland (and perhaps Gordon Bell, who was at C-MU at the time) evaluated the competing designs and rejected both in favor of what we know as the PDP-11. (A less common version of this story is that the reason that DEC never produced a PDP-13 was because the number 11 was assigned to what became the Nova; this is unlikely because the PDP-X prototype came before the PDP-11.) Both DEC and Data General are quiet about these stories. Today, all of the PDP machines are in DEC's corporate past, with the exception of the PDP-11 family of minicomputers and microprocessors. Of course, occasionally, some lab builds a machine out of DEC hardware and calls it a PDP with a new number. For example, the Australian Atomic Energy Commission once upgraded a PDP-7 by adding a PDP-15 on the side; they called the result a PDP-22. [See Mark Crispins 1986 list of PDP's at the end of this document] What is a PDP-11? ================= Evolution of the PDP-11 family of computers. During the late 1960s DEC had built a successful business based mainly on the success of its 12-bit PDP-8 series of minicomputers. However, the time had come for the introduction of a 16-bit machine to replace/supercede the -8. Edison DeCastro designed a 16bit machine, but after a disagreement left DEC, formed DG, and built the initial success of that company on his 16bit NOVA. There was much rancour surrounding the events of DeCastro leaving DEC and setting up DG. Stories abound as to the reasons of the bitterness, but I have never been able to get an authorative source to confirm what really happened. DEC eventually countered with its entry into this market segment - the PDP 11/20. This machine was to father a whole industry; lay the foundations on which the VAX would later be built; and virtually launch the OEM industry attracted to the connectability and extendability of the UNIBUS, and later, Q-Bus. Indeed, Computer Engineering by Bell/Munge/McMcNamara refers to the VAX-11/780 as being another -11 rather than the start of a new and different family. The early VAXes, of course, had PDP-11 compatability mode built in, and many VMS utilities were taken from RSX and run in compatability mode for a number of years until eventually replaced by native mode utilities sometime around VMS V3.0. Since then, the PDP-11 had 16 to 22 processors, depending on how you count them, many with variants. The following attempts to briefly track the evolution and progression. In 1969 the 11- family was projected as follows: Model CPU Comments ------ ----- ---------------------------------------- 11/20. KA11 Origin of the species 1x performance. 11/10 - .7 of the 11/20, technologically cost reduced 11/20 in MOS. [This obviously became the 11/05, 11/10] 11/30 KA11. [Seems to have been the same as an 11/20 packaged with a little more memory, etc. I believe this is what eventually became the 11/20 that actually shipped] 11/40 KB11 2x performance. 11/45 KB11 2x performance. [Seems to have been intended to be an 11/40 with MMU. [Looks like this bacame the 11/40 that eventually shipped.] 11/50 KC11 2x performance. Hardware floating point 32 bit processor. [I believe the 32 bit refers to the FPU!] 11/55 KC11 2x performance. With MMU. [It looks like the 11/50 plus 11/55 became the eventual 11/45] 11/65 KD11 4x performance. 32 bit seperate memory bus, 32 bit processor. It is interesting to note how things progressed in reality. Technology allowed, and the market drove, the production, within a couple of years, of machines considerably in advance of what was envisiged on April 3 1969. It is also interesting to note that some people were already thinking 32 bits! What different PDP-11 models were made? ======================================= Jun 1970: 11/20, 11/15 born. Small Scale integration. 4 or 8k words mem, 28k max. (Some documentation referred to 32k max memory, but the top 4k was reserved for the I/O space. Machines with 28kw core were rare, and most were shipped with 4kw or 8kw). Magnetic Core Memory. TTY ASR33 console. Papertape reader/punch typical I/O. Clock State cpu control. [All subsequent PDP-11 machines were to be microcoded]. The processor boards, all 15+(?) of them plugged into a 3 bank 4 x 6 slot backplane. Each 4kw of memory occupied a further 4 x 6 slot backplane with some 13(?) modules. There was room in the 11" CPU drawer for three or four (?) such backplanes. [NOTE] No matter what memory configurations, 16 bit, 18 bit or 22 bit were to be employed throughout the life of the PDP-11 family, the top 4kb were always reserved for I/O addresses, registers, etc. The addition of bootstraps, diagnostics and other such devices extended the reserved addresses to the top 16kb by the mid 1970's. Jun 1972 11/45. This was the first of the highspeed processors that begat 11/50, 11/55 and 11/70. 11/45 was microcoded, SSI/MSI, memory bus, core, MOS or bipolar memory. Max Memory 256kb addressable via optional 18 bit Memory management unit. Optional Floating Point Unit. 11/55 had special bipolar high speed mem. Fast peripheral to memory slots Split I&D spaces. Introduced some extra instructions such as MUL, DIV, ASH, ASHC, SPL. The 11/45, /50 and /55 had the same CPU - the differences being in memory types, bus layouts, etc. The 11/70 was to have essentially the same cpu, with modifications to allow for Cache, 22-bit addressing and, for the first time, non-Unibus memory. The PDP-11/45/50/55 had two Unibuses, normally joined by a single spaced jumper. The second Unibus has no arbitration, and was part of dual-ported fastbus memory. If you had fastbus memory (which made a 45 a 50 or 55), a second processor could access the memory. The only problem was that with the Unibus A and B split, DMA devices on Unibus A could not see the fastbus memory. I [not MMcC] had a PDP11/50 and PDP11/20 set up in such a fashion, with the PDP11/20 doing high speed A/D sampling and signal averaging using shared memory with the PDP11/50. KB-11 the original /45 cpu. Used the FP-11 asyncronous FPP. Later machines under the /45 label were core memory /55s. Jan 1973 11/40, 11/35. Price same as 11/20, higher performance. (See tables and chart below for relative performance of the various PDP-11 processors) Small- and Medium-Scale Integration. Architecture of CPU like 11/45 without the raw power. Memory Management Unit, EIS/FIS Extended and Floating instruction sets as options. Introduced with Core memory, and later with MOS. Microcoded. Max Memory 256kb. Extra instructions such as SOB XOR MARK SXT and RTT introduced. MUL, DIV etc implemented in the EIS option. Jun 1972 11/05, 11/10. Performance same as 11/20, lower price. Microcoded. 2-board processor. New 8kw 3-board core memories were introduced with the /05 and /40. Later on, 16kw memories were used before core got supplanted my MOS Memory. I remember these memories spec'd for a 980ns read/write cycle. I also remember the 11/05 CPU boards having the most green ECO wires I had ever seen on a machine. The cost of adding those wires manually must, on reflection, added significantly to the cost of manufacture or the 11/05. Later board revisions eliminated these almost completely. It is interesting to consider that modern design, simulation and testing tools has virtually eliminated the ECO wire parctice - a practice that we took for granted during the '70s and early '80s. Mar 1975 11/70. CPU very similar to 11/45 in raw performance. Machine introduced with had core initially and MOS later. These machines introduced Cache, 22bit Memory management of up to 2Mb. Optional Floating point processors. Massbus periperal controllers which had a direct path to memory first appeared on this machine. Note that MASSBUS (RH70's) adapters attached directly to memory were unique to the 11/70 -- MBAs only otherwise appeared on different series (PDP-10, VAX etc). Unibus systems could use MASSBUS peripherals, but the controllers (RH11's) spoke over the Unibus and lost most of the speed advantage. While this machine was not the fastest -11, that title belonged to the bipolar memory eqiopped 11/55, no other -11 could approach the 11/70 in terms of I/O throughput over its multiple massbus/memory bus architecture. The KB-11B was the original 70 cpu. Similar to the KB11 based 11/45, plus unbus map, 22-bit, MBCs etc. The 11/70 had the 'feature' of the slowest bus of ANY 11. And when a unibus peripheral did DMA, EVERYTHING stopped! This is one of the reasons the Seti upgrades are so good. They enable the RHs, CPU, and unibus to all operate in parellel. KB-11C The fp-11 proved 'featurefull' in practice, and was replaced with a faster syncronous FP-11C. this required the "FP-11C compatable KB-11" The 11/70 was a 18 month overnight wonder to fill the gap left by the late development of the 32 wonder box! :-) The C/D cpus used the FP-11C FPP. in fact the KB-11C is refered to as the "FP-11C compatable KB-11" in some manuals. | Relative CPU performance (VAX780 = 1.0): 0.60, Technology TTL | SSI/MSI, I/O Bus Capacity: 4 MASSBUS ports. | Space/Power Requirements: 2 H960 = 9.0 Square feet, 6,000W 1975 (ish) LSI-11 PDP 11 First of the microprocessor -11s, implemented on 4 chips. Used the T(iny)-11 chipset from Western Digital(?) First of the Q-bus machines (All others above were UNIBUS.) Implemented on a single quad height board. Performance approx equal 11/05. Minimal size. Aimed at OEM imbedded controllers etc. Jun 1976 11/55 had special high speed (300ns) bipolar mem. Floating point as option. Kernel, Supervisor and User CPU operating modes. Otherwise identical to 11/45. Interestingly, a table in Bell/Mudge/McNamara's Computer Engineering (page 406) shows the 11/55 performance relative to the 11/03 for basic instructions per second as 41 (vs 36 for the /70) and Whetstones of 725 (vs 671 for the /70). Obviously the 300ns bipolar memory made a difference in raw performance. Of course this system could not approach the /70 in throughput. KB-11D The 18 bit version of the C. used in 55s and very late 45s. I think all 50s were KB-11 cpu'd. (PaulR) The big difference between a 50 and a 55 is the 55 is a KB-11D, not a KB-11 cpu. KB-11: (11/45, 11/50). KB-11B: (11/70), KB-11C: (11/70). KB-11D: (11/55). KB-11Cm: (11/74*). KB-11E (11/74*) that never shipped. [* See the Never 11's below] 1976 (ish) LSI-11/2 (11/21?) KD11-HA. Double height module follow on to LSI11. Performance = 11/05, price much less. Qbus. Lacks onboard memory and WCS chip socket. Basically the same chipset. Both used in PDP-11/03 systems. LSI-11 sucks more power than the LSI-11/2 Jun 1975 11/03 Same microprocessor. Performance = 11/05, price much less. Qbus. More expandable than LSI11-2. Aimed at low end of 11/05 market. Sep 1975 11/04 Same microprocessor. Follow on to 11/05. Performance = 11/05, price much less. Unibus Mar 1976 11/34. Follow on to 11/40 at same perf/lower cost. Two board cpu in SSI/MSI. Initially two switch front panel. (Halt&Boot). Optional calculator-style Octal front panel later, although most customers opted to have this as time progressed. The 34 style memory managment was 18 bit and the memory management was standard. Mar 1978 11/34c. Midlife kicker. "Classic use of cache". Enhanced version of 11/34. Re-engineered, "cleaned up". Jun 1977 11/60. Intended Follow on to 11/40 at the high end/same price. Higher performance. Writable control store for custom instructions. Too costly, too late. Memory management was 18 bit and standard Floating point instructions were standard - but implemented by the CPU microcode. There was a floating point coprocessor option. The 60 was to have been a 22 bitter originaly. 1978? PDT family. PDT 11/110, 11/130, 11/150. The PDT-11/110 and -11/130 were built into a into the cardcage of a VT100 (along with the terminal). The 11/110 simply had code to allow down-loading of the PDP-11. It had no peripherals. The 11/130 had two TU58's mounted just under the monitor. The PDT-11/150 was built into a table-top unit which also had two RX01 equivalent drives, and the cpu board was built into the the Floppy box. The PDT-150 had separate VT100 and systems box. The system box is a box roughly two feet tall by two feet wide by two and a half feet deep. The box slopes to the front and has a small front panel that reads "digital PDT-11" and has four LEDs ("1", "2", "RUN", "POWER"). The top of the case is plastic and is held fast by two screws; undoing these allows access to the CPU and logic. Two RX01 drives (8.5" floppies) are mounted in the bottom 75% of the cabinet. There are three terminal ports, one console port, one printer port, and one modem port. All of the connectors, save for the modem port, are female DB25 connectors, which I have been told is rare. Depending upon the version of RT-11 being used, the machine expects either VT52 or VT100 console/terminal input -- I believe that versions prior to 4.0 default to VT52. The stock memory appears to be about 30K words (not including the I/O page). It is also noteworthy that the RX01 firmware is suspected of not being strictly "real" RX01. The PDT will write fresh single-density formatting every time it writes to the disk. All three had the equivalent of an 11/2 (same chip set, in fact) and 60kb addressable (rather than 56kb, since it had only a 4kb I/O page) These machines, running RT11, could be viewed as being the forerunners of todays PCs. They were never marketed as such, and thus faded into obscurity. 1980 (ish) 11/44. successful follow on to 11/40 high end/11/70 low end. Almost 11/70 power at 11/40 price. Unibus. Also, it could have the CIS option. | Relative CPU performance (VAX780 = 1.0) 0.42, Technology | SCHOTTKY TTL MSI, Maximum memory 4MB ECC MOS, Maximum I/O | throughput 5MB/s UNIBUS, Cache size 8KB, Cache Cycle time 275 ns | Space/Power H9642 = 4.4 sqft, H9645 = 6.3 sqft, 1,224W 1979 11/23. successful follow on to 11/03. Single F(onz)-11 chip. 11/34-ish performance at lower cost. Qbus. F11 chip does 22 bit addressing, but only 18 address lines brought out in earliest versions; all 22 brought out on later revs of the KDF11-A. 1980 (ish) 11/24. successful follow on to 11/04,11/34. F-11 chip. Price of 11/04 perf=11/34. The 11/23 and 24 had the 11/34 style memory management. They both had 22 bit addressing, but for the 24, the Unibus map (to map 18-bit unibus DMA addresses onto the 22 bit memory address) was a (rather rare) option called, I believe, a KT24. 1984(ish) PRO-350, PRO-325. This machine was released as one of a triumverate of PCs by DEC. The PCs consisted of the DECmate-II PDP-8/WPS based dedicated word processor; the 8080/8086 based | Rainbow, and the F-11 based PRO-325/350. Although the machines were well engineered, they were not successful in the marketplace for a number of reasons. First, the customer base was confused by being offered three totally separate, incompatable offerings. Second, the Rainbow, although able to run both CP/M and MS/DOS was incompatable in both hardware and software with the IBM PC that was establishing the defacto standards for the industry. And third, the PRO-350 was based on a bounded, restricted version of RSX11, and was viewed as an oddity in the marketplace. | The PRO-325 was the same as a PRO-350, but it only had the RX50's | in it, the PRO-350 had an RD-series hard drive (originally an | RD50, but with newer controllers you could have up to an RD52) and | the RX50's. The PRO-380 was the same as the PRO-350 regarding | devices. All three had a bitmap display. The PRO-325/350 was | based on the F-11 (11/23) chip set. The PRO-380 was based on the | J-11 (11/73) chip. They all were desktop units, though an option | allowed them to be mounted in a tower configuration. 1986(ish?) PRO-380. This was an upgrade to the PRO-350, using the J-11 chipset. The market opportunity was closed to it at this time, and they only had limited success. The PRO-350/380 probably saw most use as console devices/frontends for a number of the VAX8000 series machines. In the following secions, quotes marked [-PSH] are extracts from the 1987 "PDP-11 Systems Handbook" 198x 11/73, Follow-ons to 11/23, 11/24. J(aws)-11 chip. Similar cost, higher performance. Replacement for 11/44. "The MicroPDP-11/73 computer provides one-third more compute power than the MicroPDP-11/53, ..." [-PSH] "Its 15-megahertz J-11 chip ... Memory is expandable in 1- and 2-Mbyte increments ..." [-PSH] 11/73 is the KDJ11-A or KDJ11-B. (The -B just puts things like the console SLU and boot roms onto one board; some revs also have PMI memory ... the boundary between the 11/73 and 11/83 is a bit fuzzy...). there was never a Unibus equivalent of the /73. /73 didn't replace either the /44 or the /70. (*Nothing* replaced the 11/70! Nothing else had the I/O throughput, and the CPU was only just outrun by the 11/83 / 11/84.) 1987(?) 11/53. "The heart of the MicroPDP-11/53 is a 15-megahertz, J-11 single board computer with 0.5 Mbytes of onboard memory." [-PSH] Essentially a stripped down /73. KDJ11-D I think -- J11 chip, 15MHz, lack cache or FPA options, have (slowish) onboard memory. There wasn't a /54. "The MicroPDP-11/53 PLUS supermicrosystem ... has an additional 1 Mbyte of memory for a total of 1.5 Mbytes of onboard memory. [-PSH] 198x 11/83, 11/84 Higher performance versions of 11/73. "The computing power of the MicroPDP-11/83 has twice the performance of the MicroPDP-11/73." [-PSH] "The MicroPDP-11/83, by combining an 18-megahertz J-11 chip and a companion floating-point accelerator chip with a new private memory interconnect on one module, ..." | [-PSH]. The MicroPDP-11's (11/23+, 73 and 83) were in a tower | configuration which could be configured for desktop use, or the | innards removed and rack-mounted. (The difference between the 73 | and the 83 was simply 1) The board clock speed, 15mhz vs 18mhz, and | 2) the type of memory. The 11/83 had PMI memory which was | configured *before it* on the qbus.) "The 11/8x can't go much above 18Mhz. While the original design called for 20Mhz, neither the J11's nor the gate arrays were up to it. Uses Private Memory Interconnect (PMI) much like the 11/70 did years earlier. The memory (for the 83) lives in the usual PMI slots, and then a bus adapter brings the bus out to the Unibus. DEC realized that they had a lot of customers with Unibus peripherals, but they didn't want to build another Unibus processor (the previous one being the 11/24), so they expanded on the 11/24 + KT-24 concept and came up with the 11/84. Considering that at that time, all DEC had on the Q-bus was the RD-series and the KDA50 which started out as a real power pig, Unibus was the way to go if you wanted a system with big (but genuine DEC) disks and high-end tapes." | Relative CPU performance (VAX780 = 1.0): 0.72, Technology J-11 18 | MHz Chipset MSI/LSI. Maximum memory 4MB PMI ECC MOS, Bus Capacity | 5MB/s UNIBUS, FPA standard, FPP standard, Cache 8KB. | Space/Power Requirements H9642 = 6.2sqft 1,100W 1990 11/93, 11/94 Possibly the last PDP, they're just the 83/84 CPU board with a higher clock speed. The 11/93 and /94 are a new design which uses the J11 CPU. Instead of cache, the entire main memory (2 or 4Mb) is on-board w/ 70ns parts. A new memory controller gate array lets the CPU at the memory during NPR transfers (even during block mode). A Z80 CPU controls 8 emulated DL ports (this subsystem is called a DLV22) with buffering, etc. The board uses the same 18Mhz DCJ11-AE as the 11/8x - all the speed improvements are from a more modern board design. The 11/9x will go above 18Mhz. PRODUCT DESCRIPTION (DEC Blurb) The PDP-11/94 is the newest and most powerful member of the PDP-11 family of multiuser systems. The PDP-11/94 features a new, performance-enhanced processor that combines the DCJ11/FPJ11 chip sets with 2 Mbyte or 4 Mbyte of high-speed onboard memory, eight buffered, programmable asynchronous serial lines and a time of year clock. The single-board implementation of the processor effectively complements the configuration flexibility and expansion capacity of enhanced UNIBUS systems packaging. FEATURES o A new performance-enhanced single-board CPU features Digital's C-MOS 18 MHz J-11 chipset, FPJ-11 coprocessor, parity memory, and eight buffered serial lines o The full PDP-11 instruction set including floating-point and EIS instructions, plus an integral floating-point coprocessor o Sophisticated 22-bit memory management, dual register set, separate instruction and data space, and three system modes: kernel, supervisor, and user o 2 or 4 Mbyte of onboard high-density parity memory o Private Memory Interconnect (PMI) architecture for high-speed data transfers and enhanced system performance o 64 Kbyte bootstrap/diagnostic ROM facility and 8-Kbyte EEPROM (100% diagnostic coverage) o Program-controlled line-frequency clock o Eight-line buffered programmable EIA/CCITT serial-line asynchronous interface o ASCII console logic for system control and debugging o Time of year clock o Full battery backup support available o Concurrent processing that allows the simultaneous execution of instructions and DMA transfers o New compact design that requires less power and offers more expansion capacity and configuration flexibility o Consistent UNIBUS systems packaging: standard 10.5 inch by 19 inch rackmount design center, H9642- and H9645-based systems cabinets o Board-Level upgrade packages for installed PDP-11/84s The PDP-11 processors have also found themselves in other roles: -Most PDP-10/DECsystem-10 and DECsystem-20 frontend processors and communications processors were PDP-11/20 and /40s. -VAX-11/780 front end processor/console was an 11/03 -Many of the VAX8000 series machines had PDP-11 based PRO-350/380 frontends. -LAT originally implemented on PDP-11s as comms processors. -DECSA Ethernet Term Server had PDP-11 as a heart. -All the HSCxxx Storage controllers use PDP-11 processors. -DEUNA Ethernet Controller ...and elsewhere. Other fun PDP11's. The 11/10S. This was a 11/10 CPU (basic instruction set, no memory management, - a low-end PDP11), with an interesting feature - You could disable the bus arbitor, and it became a DMA peripheral to another PDP11 - a parallel processor. I have never seen this documented, but the boards were common enough as simple 11/10 processors The Never-11s ========================= There are a number of very signigicant projects that never came to market as originally envisaged, although the lessons learned sometimes got applied to later offerings. The 11/74 is probably the most famous. Hydra. Was to have used the KB-11Cm CPU, Modified to interlock the ASRB instruction in memory, allow cache bypassing on a per page basis, and tweaked powerfail/re-start for the 11/74. These where shipped with MKA-11 memory boxes as the 11/70mu system. All to AT&T I believe. The only mp systems were Castor/Pollux at RSX dev group in ZK (Software Engineering at Spitbrook Road, Nashua NH), and the RSX DECnet group in Tewksbury MA. Ontario Hydro also had one for field test and invented "just say no" when the field test ended. :-) BTW HRC, the reconfiguration task is short for "hercules", who tamed Cyrberus. ( the MP version of TRAX/M-PLUS ) 11/74. Probably the most famous PDP-11 that never was. Designed as a 4-way multiprocessor with four 11/70 processors clustered around shared memory. Configuration was SMP. Furthermore, the processors, which had been originally designed as Fortran crunchers were to be equipped with the Commercial Instruction Set (CIS) for Cobol applications. Prototypes were built and a number of alpha units installed, but the product never came to market. Reasons for it never being shipped are various and may be apocryphal: the backplane would have been so complex to be almost unmanufacturable; the cost due to the complex backplane would have been too high; the 11/74 with CIS would have blown the new VAX-11/780 out of the water in commercial applications. Those that truly know are not talking :-) . The backplanes are almost standard KB-11C. The u-code is changed to interlock the ASRB instruction, cache bypassing is added and a few minor other changes. No problem to manafacture. The memory is the MKA-11, with 4 memory ports. That's 32 flat gray cables in and out of each box except the last, plus box controller cables (4) and batt backup. Plus the IIST, the DIP-11. [somehow the this reference missed...anyone elaborate? -MMcC] The CIS equipped unit was the KB-11E cpu, aka 11/110. Another contempory of these was the 11/68. (see Bluefin) KB-11E This was to have been the 'real' 74. A KB-11Cm, cleaned up, and with CIS included. Canned just as it was to go to production. The maint prints for the CIS were in the hardware catalogue, as where the MKA-11 manuals. The KB-11Cm tech manual is listed as EK-KB11CM-TM, yep 2-6-2 not 2-5-2, in at least 2 places. Bluefin, aka 11/68. The 60 was to have been a 22 bitter originaly. The 11/68 was to have had up to 16 cpus, each as powerfull as a 4-cpu 74! Canned to prevent competition with a future 32 bit product. ECL-11. 18 bit system done at CMU. 11/110 and the 11/120. The MKA-11 manuals refer to these. Perhaps they were going to be what became the 11/780 VAX? PDP-11 Relative Performance =========================== >From a chart in the 1978 "Computer Engineering" 11/03 11/04 11/05 11/20 11/34 11/34c 11/40 11/60 11/45 11/55 11/70 ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- Perf(1) 1 2.8 2.5 3.1 3.5 7.3 3.6 27 41 36 core 13 mos 23 Bipolar 41 Whets 26 18 13 20 204 262 57 592 725 671 core 260 mos 335 Bipolar 362 (1) performance is for the basic instruction set relative to the 11/03 >From a chart in the 1987 "PDP-11 Systems Handbook" 11/23 11/53 11/73 11/83 11/93 ----- ----- ----- ----- ----- CPU F-11 J-11 J-11 J-11 J-11 Microcycle(ns) 300 267 267 222 222 Clock (Mhz) ? 15 15 18 18 Performance 0.2 0.5 0.7 1.2 ? (11/70 = 1) Cache no no yes yes no(?) Floating-Pt opt no no yes Yes(?) Coprocessor .........And by merging the data from both charts: P r 45 - e e 40 - - _ r l 35 | f a 30 | o t 25 _ | _ e i 20 | m v 15 - - - a e 10 n 9 c t 8 e o 7 - - 6 1 5 1 4 0 3 _ - _ - 3 2 - 1 _ 0____________________________________Models____ 2 0 4 0 0 3 3 6 4 4 5 7 2 5 7 8 8 0 5 0 3 4 4 4 0 5 4 5 0 3 3 3 3 4 c [I was tempted to label the vertical index of the chart in PUPs (PDP-11 Units of Performance, but resisted the temptation. :-) -MMcC] Generally, earlier model PDP-11s with odd numbers are OEM machines and Even numbered ones are End-user machines. [11/15, 11/35, 11/05 , (but not 11/45,11/55) vs. 11/20, 11/40, 11/10, 11/34, 11/44, 11/70]. This carried on in a variation to the later model numbers where the odd numbers became Q-Bus machines and were aimed at OEMs and the Even-numbered were Unibus machines and were aimed at end-users. Thus the Qbus 11/03 /23 /53 /73 /93 are aimed at the OEM and the Unibus 11/04 /24 /54 /7? /94 are aimed at enduser market. Most of the PDP-11 line bore the standard maroon and purple colors. [er, Cyan and Magenta to be exact] The 55 and some of the integrated systems were blue and green (as were the DEC-10 FEP 40's and some later front panel less 70's). The 11/60 came in the low boy (VAX) style. The 11/34 and the later unibus (24, 44) came in the white single fronts. What operating systems were written for the PDP-11? ===================================================== DOS/BATCH RSTS, RSTS/E Resource Sharing/Time Sharing. General purpose Time sharing system. CAPS-11 Cassette Based programme development System. MUMPS-11 Mass. General Hospital Multi User Multi Processing System. Data Management Operating system. RT11 Real Time. Foreground/Background or Single Job operating system. TSX11 (Third Party). Multiuser enhancements to RT11 RSX11, Resource Sharing eXecutive. Multiprogramming system RSX11/M, Small to moderate-sized real-time multiprogramming system RSX11/M+, Extended RSX-11/m RSX11/S, Execute Only real-time multiprogramming system RSX11/D, Large real-time multiprogramming system RSX-11B/C, Micro/RSX IAS Interactive Application System. Multi Purpose Multiprogramming system. TRAX Transaction Processing system. Unix (tm). (much/most of unix developed on PDP-11s) MERTS (MERTSS?) "Virtual operating system that could run Unix as a process. ..several machines at BTL ran MERTS" | CTS-300 (layered on RT-11) | CTS-500 (layered on RSTS) | TSX in all its flavors (third party, layered on RT-11) | HT-11 (Heathkits hacked RT-11, wouldn't run on a | "real" PDP-11) | Ultrix Digitals implimentation of BSD UNIX | Venix Third party UNIX | MUMPS-11 Mass. General Hospital Multi-user Programming | System (?). A language, an operating system and | a DBMS all in one. What programming languages are supported on the PDP-11? ======================================================= Assembler Macro MUMPS BASIC, BASIC-plus2 Cobol Fortran IV, Fortran IV+ Focal C Bliss-11 LIL (?) Memory address convention (for this FAQ), and the GPRs ======================================================= There is a certain amount of confusion about memory addressing representation due to the fact that the PDP-11 was originally launched with 16-bit addressing, but was extended through 18-bit to 22-bit over time. On the 11/20, the processor status word (PSW), the topmost addressable location, would have address 177776, while on the 11/40 the address would be 777776, and on the 11/70: 17777776. Of course the hardware also helped in bit extending for you if you toggled in 177776 in an 11/70.... For the purposed of this FAQ I propose to take the middle ground and refer to address as if we were talking about an 11/40. Make your mental adjestments as appropriate. There is one further area of confusion. Addresses are byte aligned, with an even address referring to a word (unless this is a byte operation in which case the lower byte of the word is the target) and an odd address specifying the upper byte of the word. In English, memory locations incremented up in steps of 2. With one Exception! The General Purpose Registers (GPRs) had addresses that incremented in steps of 1. R0 is 777700, R1 is 777701 .. R6(Kernel) is 777706, R7(Kernel) is 777707. Later models had a second set of GPRs at 777710 through 777717. The complication does not stop here, though. The Kernel Stack pointer (SP) is at 777706, the supervisor SP at 777716 and the User SP at 777717. What is the PDP-11 instruction set? =================================== The instruction set of the PDP-11 was heavily influenced by the language it was expected to run most often - Fortran. Amongst the design constraints were the following: Word length to be a multiple of 8 bits; Range extensibility - especially upwards; Interrupt responsiveness with multiple interrupt levels for realtime computing; Modularity. Word length is 16 bits with the leftmost, most significant bit (MSB) being bit15. 8 General registers of 16 bits each. or these Register 6 is the stack pointer (SP) and Register 7 is the program counter (PC). There is also a Processor Status Register/Word (PSW) which indicates the 4 condition code bits, the Trace Trap bit, processor interrupt priority, and 4 bits for current and previous operating modes. Addressing on the -11 is linear from memory address 0 through 777776. Memory management allows access to physical memory beyond the 16 bit boundry (177776). All I/O devices, registers etc are addressed the same as memory addresses. These live in the 4kw of reserved memory space at the top of the addressing range. Thus Register 2 (R2) has an address of 777702. All word memory addresses are even. In byte operations, and even address specified the lower byte and an odd address specifies the upper byte. Specifying and odd byte in a word operation will retun an odd address trap. Speaking of which...memory addresses from 0 to 400 octal are reserved for various exception traps such as timeouts, reserved instructions, parity, etc., and device interrupts. Addressing for the Single Operand, Double Operand and Jump instructions is achieved via six bits. _ _ _ _ _ _ |x|x|x|_|_|_| |Mode |Reg | where the modes are as follows: (Reg = Register, Def = Deferred) Mode 0 Reg Direct addressing of the register Mode 1 Reg Def Contents of Reg is the address Mode 2 AutoIncr Contents of Reg is the address, then Reg incremented. Mode 3 AutoIncrDef Content of Reg is addr of addr, then Reg Incremented Mode 4 AutoDecr Reg is decremented then contents is address Mode 5 AutoDecrDef Reg is decremented then contents is addr of addr Mode 6 Index Contents of Reg + Following word is address Mode 7 IndexDef Contents of Reg + Following word is addr of addr However, when Reg = 7 (PC): _ _ _ _ _ _ |x|x|x|1|1|1| |Mode | R7 | Mode 2 Immediate Operand follows the instruction Mode 3 Absolute Address of Operand follows the instruction Mode 6 Relative Instr address+4+Next word is Address Mode 7 RelativeDef Instr address+4+Next word is Address of address Mainstream instructions are broken into Single operand and Double operand instructions, which in turn can be word or byte instructions. Double Operand -------------- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |_|x|x|x|_|_|_|_|_|_|_|_|_|_|_|_| |1|x|x|x|_|_|_|_|_|_|_|_|_|_|_|_| | | | : | : | | | | : | : | | | Op | Source | Dest | | | Op | Source | Dest | Word Instruction Byte Instruction (Bit15 Set) The operands are: With Bit 15 Clear: With Bit 15 Set: ----------------- ----------------- --- 000 Single Operand Instr. MOV 001 Move CMPB 010 Compare Byte CMP 010 Compare BITB 011 Bit Test Byte BIT 011 Bit Test BICB 100 Bit Clear Byte BIC 100 Bit Clear BISB 101 Bit Set Byte BIS 101 Bit Set SUB 110 Subtract (Special case) ADD 110 Add 111 Arithmetic functions not in original set Single Operand -------------- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |0|0|0|0|x|x|x|x|x|x|_|_|_|_|_|_| |1|0|0|0|x|x|x|x|x|x|_|_|_|_|_|_| | | | : | : | | | | : | : | | | | Operand | Dest | | | | Operand | Dest | Word Instruction Byte Instruction (Bit15 Set) The operands are: With Bit 15 Clear: With Bit 15 Set: ----------------- ----------------- 101 000 CLR Clear 101 000 CLRB Clear Byte 101 001 COM Complement 101 001 COMB Complement Byte 010 010 INC Increment 010 010 INCB Increment Byte 101 011 DEC Decrement 101 011 DECB Decrement Byte 101 100 NEG Negate 101 100 NEGB Negate Byte 101 101 ADC AddCarry 101 101 ADCB AddCarry Byte 101 110 SBC SubtractCarry 101 110 SBCB SubtractCarry Byte 101 111 TST Test 101 111 TSTB Test Byte 110 000 ROR RotateRight 110 000 RORB RotateRight Byte 110 001 ROL RotateLeft 110 001 ROLB RotateLeft Byte 110 010 ASR ArithShftRight 110 010 ASRB ArithShftRight Byte 110 011 ASL ArithShftLeft 110 011 ASLB ArithShftLeft Byte 110 100 |Mark, MTPI, MFPI 110 100 | 110 101 |SXT not in basic 110 101 | N/A 110 110 |instr set 110 110 | 110 111 |originally 110 111 | Branches -------- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |x|0|0|0|x|x|x|x|d|d|d|d|d|d|d|d| | | | : | : : | |O______|_perand| : Dest | 0 000 000 1__ BR Branch Always 0 000 001 0__ BNE Branch if not Eq 0 0 000 001 1__ BEQ Branch if Eq 0 0 000 010 0__ BGE Branch if GT or Eq 0 0 000 010 1__ BLT Branch if LT 0 0 000 011 0__ BGT Branch if GT 0 0 000 011 1__ BLE Branch if LT or Eq 0 1 000 000 0__ BPL Branch if Plus 1 000 000 1__ BMI Branch if Minus 1 000 001 0__ BHI Branch if Higher 1 000 001 1__ BLOS Branch if Lower or Same 1 000 010 0__ BVC Branch if oVerflow Clear 1 000 010 1__ BVS Branch if oVerflow set 1 000 011 0__ BCC Branch if Carry Clear (=BHIS Br if Highr or same) 1 000 011 1__ BCS Branch if Carry Set (=BLO Br if lower) Condition Code Operations ------------------------- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |0|0|0|0|0|0|0|0|1|0|1|s|N|Z|V|C| | | | | : | | : | | O p e r a n d | |MaskBits| General opcode 000240x. Set/Clear corresponding bits depending on sense of bit 04. I.e., 000243 will set the V,C bits while 000263 will clear the V,C bits. Codes 240 and 260 set/clear no bits and are, thus, used as NOP. Other, Miscellaneous -------------------- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |0|0|0|0|1|0|0|0|0|0|0|0|0|0|0|0| JSR Jump to Subroutine | | | Op | Reg | Mode| Reg | _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |0|0|0|0|0|0|0|0|2|0|0|0|0|0|0|0| RTS Return from Subroutine | | | | Op | | Reg | Use same Reg as the JSR _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |0|0|0|0|0|0|0|0|0|1|0|0|0|0|0|0| Jump Always | | | | Op | Mode| Reg | _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ |0|0|0|0|0|0|0|0|0|0|0|0|0|x|x|x| 000 = Halt, 001 = Wait, | | | | | | Op | 010 =RTI Return From Interrupt 100 =BPT Breakpoint Trap 101 =Reset. InitialisesEverything! Other Arithmatic and floating point instructions were added to the basic set over the years, but those listed above formed the core PDP-11 instruction set. | The PDP-11 Maintenance Panel | ======================= | The PDP-11 Maintenance Panel was introduced with the 11/20. It comprised | of two single height boards, a lamp driver and a lamp/switch board. | Through the use of the four switches, the processor clock could be | interrupted and single stepped through the ISR and BSR timing states of | the 11/20. Timing state numbers, Condition Codes and certain other flags | were displayed on the maintenance panels 16(?) lamps. Of course, having | the machine frozen in suspended animation also facilitated the | troubleshooting of the internal circuits by occilliscope. | | On the 11/40 there were two slots into which a maintenance panel could | be plugged. In the first slot you could single step the processor clock | and cycle through the microde program. The processor could be made to | stop at a specific microcode address (MPC) set in the front panel | switches. The panel could be plugged into a different slot and perform | the same function for the Floating Point Processor. If you thought that | the PDP 11 had a wide and complex micro instructions, you should have | seen the FPP! | | The panel also performed the same function on the 11/05 (no floating | point) and was also used on the 11/70. A good technician would have been | able to determine a fault on an 11/40 and 11/70 using nothing more than | the maint panel, front panel, and knowledge of the inter-relationships | of the processors data paths. | | [I am unclear whether the Maint Panel was used in later PDP-11s. I seem | to remember that certain of the micro-stepping and micro trapping | functions were incorporated into the calculator-style front panels of | the 11/04, /34, /44 and /60. And I draw a total blank re: the later | Micro-PDP-11's. Perhaps someone can fill in some detail here? -MMcC] | The front panel on the PDP-11 went through some major revisions. The | original 11/20, 11/15, and later the 11/05 and 11/10, 11/40 and 11/35, | 11/45, 11/50, 11/55, 11/70 and 11/74 were equipped with what the purists | regard as the "real" front panels. Subsequent machines had | chicklet-calculator octal panels, or almost nothing than boot/halt | switches. | | The 11/20 panel had a display indicating | Address lamps: 18 Status lamps | Data lamps: 16 Status lamps | [perhaps a kind person with artistic skills could do justice | here? And maybe someone could jog my memory as to exactly what the | status lamps were? -MMcC] | There were also 18 toggle switches for loading Addresses or data | (Numbered 18 --> 0 in the manner God intended), and seven "action" | switches for Load Address, Examine, Deposit, Halt, Start, SingleStep, | Continue. [I think.....-MMcC]. Lamps were incandescent and switches were | thin plastic - some 3-4 mm thick, and coloures Magenta and Orange-ish. | | The 11/05 economised on the front panel. LEDs replaced lamps and there | was only a single row of them. They were multiplexed, and whether they | displayed Data or address depended on the function being performed. | "Action" switches remained similar to the 11/20 with the possible | omission of the single step. [Help needed here ...]. The switches were | small white plastic. | | The other machines mentioned above had serious front panels. Great big | triangular wedge shaped keys; two rows of data and address lines; and | function lights. The 11/40 had | Run, Bus, User, | Processor, Console, Virtual | The 11/55 had | User I Super I Kernel I Prog Phy | User D Super D Kernel D Cons Phy | | Data Paths u-Address FPP/CPU | BUS Register Display Register | ...and a pair of rotary switches | to select between the two sets of displays! | The 11/70 display was similar if slightly different in detail. Of course | it had 22 of those nice big Data/Address switches! | | With the advent of the 11/04, 11/34 and 11/60 two consoles were offered. | One could go the minimalist approach and purchase the cheapie and get a | Boot and Halt switch along with a Run lamp. Not exactly loved by those | that to interact with the machines intimately! Alternatively one could | purchase the more fully featured (KY11-B ?) panel with the chicklet keys | and calculator face. Many technicians had their own personal chicklet | panels for troubleshooting those machines ordered with the minimal | panel. | The 11/60 was shipped with only the calculator-style panel. I seem to | recall that DEC might have relented and done likewise with later 11/34 | models. | More recent PDP-11s seem to have nothing more than a power switch, | although I believe a button or two and a couple of LED's might lurk | under the covers if you know where to look for them. Trivia/Humour/Stories ======================= The 11/70 Hack: The following was posted in a Newsgroup: I enjoyed your quiz, but feel that one answer is somewhat misleading (or maybe just over-simplified?). Your question: 3. Tom Farrin is famous for a hack he did to DEC's pdp-11/70. This was a trace cut and jump inside the CPU which: a) increased the system clock speed by 12.5% b) enabled IEEE-compatible floating-point arithmetic c) froze the contents of the cache d) disabled the Unibus reset that occurs automatically on a bus error e) made separate instruction and data space available in user mode [....] ..to which Robert Herndon provided additional insight: "and the answer is listed as "E". I was present at a lecture he gave at the 1978 Unix Users Group Conference in NYC (this was just before they asked BTL for official permission to call themselves this, and were turned down, after which the conferences became "Usenix" conferences). In it, he described how he needed the MFPI instruction (move from previous instruction space; it gets a word of data from the "previous mode"'s instruction space) in order to efficiently determine the number of arguments pushed on the stack. This was because his lisp interpreter was too big to run without running in separate I & D spaces (type 411 binary, as opposed to 407 (unshareable), or 410 (shareable, but common address space). Running programs in separate I & D spaces was an everyday event on PDP-11s at the time, but separate I&D binaries could not use the nargs() procedure (which looked at the caller's instructions). Since his program was running in separate I & D spaces, any loads to look at the caller's instructions would simply load a word from the data space at the same address. DEC, in their wisdom, had made the MFPI and MFPD instructions privileged, so he couldn't use them to look at his instruction space. So he made a system call available to do this function, but found that it was very slow. And as he put it, that wasn't very satisfactory, and "Well, there's this NAND gate, and if you cut this wire...", and the room dissolved in laughter. And then he told us that this cut was available as a DEC field mod and gave us its number... The 407 Header If you want another bit of trivia in this vein, the 407 header number for Unix binaries is an artifact of the PDP-11's instruction set. This is a 'branch forward 7 words'. In case you installed your block-zero bootstrap without first stripping off the eight-word header, this allowed it to run anyway (since the code was position independent). Other machines have used 407 headers ever since for no good reason... [rh] Who's Who? =========== C. Gordon Bell is generally credited with the original design of the PDP-8. He was also involved with recommending what became the PDP-11 when that design was competing with the design that probably became the NOVA, and as vice president of research, he oversaw the development of the DEC VAX family. Alan Kotok worked with Bell in working up the original specifications of the PDP-8. Ben Gurley designed most of the big DEC machines, starting with the PDP-1. The actual design work on the -8, however, was done by Ed deCastro, who later founded Data General to build the Nova. Ken Olson ran DEC from the beginning. Ed Yourdon, who later became well known as a programming methodology guru, hacked up the PAL III assembler for the -8, based on PAL II. Charles Lasner developed P?S/8, and he is widely known as the grand old man of the movement to preserve these historic machines. Wesley Clark developed the LINC while working at Lincoln Labs; this was the first 12 bit minicomputer built with DEC parts. Mary Allen Wilkes Clark developed the early LAP programs for the LINC. Douglas W. Jones wrote the PDP-8 FAQ, from which the introductory "What is a PDP" is unabashedly cribbed. Most of my [MMcC] direct knowledge is of the earlier 11's and gets real hazy around the 11/5x - 11/9x boxes. However, the following contributors have helped fill in the gaps here and elsewhere in PDP-11 history, and otherwise helped with the FAQ: ARD@SIVA.BRIS.AC.UK (tony) ron@topaz.bds.com (Ron Natalie) BQT@SOFIA.DOCS.UU.SE (Johnny) terry@spcvxb.spc.edu> Terry Kennedy, zrepachol@cc.curtin.edu.au (Paul Repacholi) tls@panix.COM (Thor Lancelot Simon) JOHNH@PSYCH.SU.OZ.AU MIKE_YANKUS@STERLING.COM (Mike Yankus) DON@ZL2TNM.GEN.NZ (Don Stokes) dwp@po.CWRU.Edu (David W. Peascoe) rh@craycos.com (Robert Herndon) COPLEY1@MUVMS6.WVNET.EDU (Ronald Copley) dworkin@Village.ORG | kaplowro@hccompare.com | mcc@wlv.iipo.gtegsc.com (Merton C. Crockett) | mccarthy@twobar.zko.dec.com | poehls@fbh.wtza-berlin.de (Hans-Joachim Poehls) | (Megan Gentry) |Mark Crispins 1986 list of PDP's |================================= | | Date: Wednesday, 20 August 1986 03:42-EDT | From: Mark Crispin | To: TOPS-20@SU-SCORE.ARPA, Boken@RED.RUTGERS.EDU | Re: DEC's PDP's | | A number of people have requested my list of all the DEC PDP's, | so I thought I'd bore you all with it. | | The PDP-1 was an 18 bit machine. It was DEC's first computer, and | some of the first timesharing systems were designed for it. It's also | unique in being one's complement; all later DEC computers were two's | complement. Some machines, such as one of MIT's PDP-1s, were in | operation until the late '70s. [The LINC portion of the LINC-8 and | PDP-12 are one's complement! - cjl] | | The PDP-2 was a designation reserved for a 24 bit machine, but as | far as I can tell it was never even designed and definitely none were | ever built. | | The PDP-3 was a 36 bit machine that was designed but never built by | DEC. However, Scientific Engineering Institute built one in 1960. | | The PDP-4 was an 18 bit machine that was intended to be a cheaper, | slower alternative to the PDP-1. It was so slow that it didn't sell | well, although it was interesting for its auto-incrementing memory | registers. It was not program-compatible with the PDP-1, but its | instruction set was the basis of DEC's future 18 bit computers. | | The PDP-5 was a 12 bit machine designed to be a small laboratory | system. It used many of the ideas in the LINC (Laboratory Instruction | Computer, designed by Lincoln Labs at MIT, some of which were built by | DEC). | | The PDP-6 was a 36 bit machine and the first machine to implement | the most wonderful computer architecture known to man. [! - cjl] It was | rather expensive and difficult to maintain, and not many were sold. As | a result, DEC cancelled 36 bit computers for what was to be the first of | many times. | | The PDP-7 was an 18 bit machine and the sucessor to the PDP-4. It | was a major price/performance win over the PDP-4 and the first DEC | computer to use wire-wrapping. | | The PDP-8 was a 12 bit machine and the sucessor to the PDP-8. [I | assume he means -5! - cjl] It basically defined the term "minicomputer", | and went through several incarnations. The original PDP-8 was followed | by the extremely slow PDP-8/S (as bad as the PDP-4 was to the PDP-1, but | at least the /S was program-compatible). [I wouldn't be too sure about | that! - cjl] DEC recouped with the PDP-8/I (using MSI integrated | circuits) and the smaller PDP-8/L, and somewhat later came out with the | "Omnibus 8" machines -- the PDP-8/E, the PDP-8/F (a half-sized version | of the PDP-8/E), the PDP-8/M (an OEM version of the PDP-8/F), and the | final machine, the single board PDP-8/A. The PDP-8/A still exists after | a fashion as a current DEC product. | | The PDP-9 was an 18 bit machine and the sucessor to the PDP-7. It | had a faster memory than the PDP-7 and was the first microprogrammed DEC | computer. Modulo a 300 wire(!) ECO required in the first machines, the | PDP-9 was a reliable machine and some are still in operation today. | There was a short-lived PDP-9/L. [Can someone explain what he means by | "microprogrammed" ? -cjl] | | The PDP-10 was a 36 bit machine and the sucessor to the PDP-6. It | is especially noted for its software, which represents the pinnacle of | DEC software engineering and has never been equalled. The first KA10, | largely installed in universities, created a whole generation of | timesharing hackers. The follow-on KI10, with paging and using IC's | instead of discrete components but otherwise unexciting, mostly was sold | to commercial organizations. The KL10 went through several incarnations | and is today the most representative of this marvelous machine. The | KS10 was a small, low-speed (approximately KA10 performance) processor | which was DEC's last successful implementation of this architecture. | | The PDP-11 was a 16-bit machine that went through more | implementations and operating systems than can be counted. Presently it | superceded the less powerful PDP-8 as the representative minicomputer. | [Some of us might take exception to this statement! - cjl] While the | PDP-11 used octal, it was in its deep heart of hearts a hexidecimal | machine, and the first indicator of the creeping IBMification of DEC | that took full fruit in the VAX. [I can hear the flames now...] Rather | than fight it the customers loved it; more PDP-11's have been sold than | any other DEC computer (possibly more than all the others combined). | | The PDP-12 was a 12 bit machine and the sucessor to the PDP-8. It | combined a LINC and a PDP-8 type processor in the same box and basically | was a new model of the LINC-8 which was the same thing. | | No PDP-13 was ever designed or built. Even DEC gets superstitious. | | The PDP-14 was a 12 bit machine with a 1 bit register. It was used | as a process control engine in applications that were felt to be too | rugged for a PDP-8, and basically replaced a set of relays. Later DEC | made PDP-8's suitable for this sort of thing, but it didn't stop them | from the ultimate silliness of building a PDP-14 that used a PDP-8 as | its console processor! [I remember something about a KL8-JA-oriented | diagnostic that was for checking out somesuch configuration! - cjl] | | The PDP-15 was an 18 bit machine and the final one of this design | built by DEC. More PDP-15's were built and sold than any of the others, | [I assume he means other 18-bit DEC machines! - cjl] and it went through | several incarnations including some which used a PDP-11 as a front end. | Apparently the cancellation of the PDP-15 came as a great surprise to | the "Tiger Team" who worked on it, although considering its general | ungainliness compared to comparable performance PDP-11's it wasn't | surprising. In many ways the PDP-15 died for the same reason the PDP-10 | did. [I for one want this elaborated on! - cjl] | | The PDP-16 was a "roll your own" 16 bit machine based on various | "building blocks". Every PDP-16 was essentially custom-designed by the | customer. It got a fair amount of attention when it was announced but | evidentally didn't sell very well. | | There was no PDP-17 or any other designator. DEC apparently | decided that "PDP" had a perjorative ring to it. | | +-------------------------------------------------------------------+ | A p p e n d i x A: Related FAQ Sites | +-------------------------------------------------------------------+ * * * PDP-11 ftp sites informational posting * * * From: shoppa@almach.caltech.edu (Timothy D. Shoppa x4256) The most current version of this list will be available via anonymous ftp from sunsite.unc.edu as the file pdp-11.ftp in the directory /pub/academic/computer-science/history/pdp-11. *************************************************************************** Site: sunsite.unc.edu (152.2.22.81) Directory: /pub/academic/computer-science/history/pdp-11 Maintainer: Tim Shoppa (shoppa@altair.krl.caltech.edu) Comments: main pdp-11 directories are: hardware Miscellaneous documentation on PDP-11 hardware decus RT-11 sig tapes from DECUS emulator PDP-11 emulators games Games for PDP-11's (various OS's) kermit krt and k11 versions of pdp-11 kermit language The PDP-11 C compiler from DECUS utils Various PDP-11 utilities Site: ftp.update.uu.se (130.238.11.20) Directory: /pub/pdp11 Maintainer: Johnny Billquist (bqt@update.uu.se) Comments: Several RT-11 sig tapes, in rt/11s108, rt/11s109, rt/11s113, and rt/11sp68 subdirectories. DEC Professional stuff, in pos subdirectory. Site: shop-pdp.kent.edu (131.123.1.153) Maintainer: Alan Baldwin (???) Comments: TCPIP for TSX+ systems. Cross assemblers for many micro's. Site: ftp.village.org (198.137.146.35) Maintainer: Dieter "Dworkin" Muller (dworkin@Village.ORG) Comments: pdp-11 faq (This document) Site: en.ecn.purdue.edu (128.46.149.59, 128.46.128.59) Directory: pdp-11 Maintainer: Mike Young (young@ecn.purdue.edu) Comments: ACPs for RSX-11, DECUS C compiler.