; File CROM30.MAC .ENABL LC ; Composite program with simple PROM bootstraps and low memory test(optional) ; --------- ; Hardware supported: ; Qnector : start bootstrap at PROM address ; WB(V)-11: start bootstrap at PROM address + 2 ; DR(V)-11: start bootstrap at PROM address + 4 ; DL(V)-11: start bootstrap at PROM address + 6 ; NOTE: ; ***** 1. After execution of the (P)ROM code a bootstrap program ; xxBOOT.SYS is read from the the remote system device SY: ; (at the service job site). Use BOOT30.MAC to configure this ; bootstrap program. ; Note that in this case the remote job should be assembled ; with one extra block buffer (=256. words, EXBUF=1 see JOB ; sources) ; However, this is not necessary for DL(V)-11 hardware (there ; is not DLBOOT.SYS program). ; 2. ORIGIN should be set at start address of (P)ROM ; h.h. apr-83 ORIGIN=173000 ;Start address of (P)ROM MEMTST=1 ;0=NO low memory test before boot, 1= do memory test QNCSR=172410 ;QN address WBCSR=175610+4 ;Output status reg. DRCSR=167770 ;Status reg. DLCSR=176500 GO =1 ;QN command SND=2 ;QN command CE =4 ;QN command .ASECT .=ORIGIN START: BR QNSTRT ;QN entry = PROM START !! BR 1$ BR 2$ JMP DLSTRT ;DL entry = PROM START + 6 !! 1$: JMP WBSTRT ;WB entry = PROM START + 2 !! 2$: JMP DRSTRT ;DR entry = PROM START + 4 !! INIT: .IF EQ,MEMTST RESET MOV #340,-(SP) ;CPU prio -> 7 MOV #.+6,-(SP) RTI .IFF ; MEMTST .SBTTL MEMORY SIZER+TEST ;------------------------ MEM: MOV PC,R1 ;Go size memory BR MEMSIZ ;Subr. call CLR R3 ;Set test data=0 BR MEMDO ;Do memory test ; ; SIZER: inp. R1=Return addres, outp. R4=Highest adr. R2=2 ; MEMSIZ: MOV #340,R0 ;PRIO 7 MTPS R0 RESET MOV #6,R2 ;R2->PS in Time out vector MFPS @R2 ;Load status vector MOV #2$,-(R2) ;Interrupt entry CLR R4 ;Set start adres MOV #1000,SP ;Set stack 1$: MOV @R4,@R4 ;Read+write mem. loc. TST (R4)+ ;If no trap, skip to next BR 1$ 2$: BIT -(R4),-(R2) ;Set R4 to highest writable adres, R2=2 MOV R4,SP ;Set stack at top of memory JMP 2(R1) ;Return to caller. ; Memory test MEMDO: CLR R2 ;Start adres ADDRT: MOV R2,@R2 ;Store adres at adres. TST (R2)+ ;Skip to next CMP R2,R4 ;All adresses done? BLOS ADDRT ;If LOS no CHECK: CMP -(R2),R2 ;Check data. BEQ ADCONT ;If EQ no comparison error MERROR: HALT ; Expected data is in R2, bad data is pointed to by adres in R2 ; Type "P" to continue test! ADCONT: TST R2 BNE CHECK ;If NE continue test. .SBTTL Memory data storage test ;-------------------------------- MEMT: MOV R3,(R2)+ ;Move backgrnd data to memory CMP R2,R4 ;All done? BLOS MEMT WALK: COM R3 ;Complement testdata. XOR R3,-(R2) ;Use backgr.& testdata to set all 1's COM @R2 ;Check for all 1's BEQ DCONT HALT ; ; Expected data in R3, bad data pointed to by R2. Type "P" to proceed. ; DCONT: COM R3 ;Get previous backgr. data XOR R3,@R2 ;Restore backgr. data for current loc. TST R2 ;Done with one pass? BNE WALK ; ; Pattern has walked through all memory. Go back examining backgr. ; data to make sure it was not affected by modif. of other locations. ; BACK: CMP R3,(R2)+ ;Is backgr. still valid? BEQ BGCONT HALT ;MEMORY BACKGROUND DATA ERROR!! BGCONT: CMP R2,R4 ;Scanned all of backgr. yet? BLOS BACK CLR R2 ;Else restore R2 to low mem. limit. COM R3 ;Flip to other pattern. BNE MEMT .ENDC ; MEMTST JMP 2(R5) ;Init complete, return. ;--------------------------- QN ----------------------------; QNSTRT: MOV PC,R5 ;Set up return BRINI0: BR INIT ; Simple bootstrap for QNJOB (Qnector DMA, Westvries B.V.) BOOT: MOV #1000-2,R1 MOV #10,(R1) ;BOOT code = 8. MOV #QNCSR,R0 ;Load IO page address MOV R1,(R0)+ ;Load BAR MOV #-1,(R0)+ ; " WCR MOV #CE+SND+GO,(R0) ; " CSR QNRDY1: TSTB (R0) ;Send BOOT code BPL QNRDY1 TST (R0) BMI BOOT MOV #-256.,-2(R0) MOV #GO,(R0) ;Receive BOOT program (1 block) QNRDY2: TSTB (R0) BPL QNRDY2 JMP @#1000 ;Execute BOOT prog. ;--------------------------- WB ----------------------------; WBSTRT: MOV PC,R5 ;Set up return BRINI1: BR BRINI0 ; Simple Bootstrap for WBJOB(WB(V)-11) MOV #WBCSR,R1 ;status MOV #WBCSR+2,R2 ;output buffer TST -2(R1) ;dump input=RECEIV BUFF ; ; Transmit: INIT(=4),BOOT(=10) ; MOV #4,R0 ;INIT R0 1$: MOV R0,(R2) ;TRANSMIT R0 2$: TSTB (R1) ;READY? BPL 2$ ASL R0 ;CHARS IN R0: 4,10,20 BIC #20,R0 ;IF (R0=20) R0=0 BNE 1$ ; ; READ 1st block(=nr. 0) into low memory ; MOV #1000,R3 3$: TSTB -4(R1) ;RECEIV. READY BPL 3$ MOV -2(R1),(R3)+ ;PUSH INTO MEM. CMP #2000,R3 BHI 3$ JMP @#1000 ;Execute BOOT prog. ;--------------------------- DR ----------------------------; DRSTRT: MOV PC,R5 ;Set up return BRINI2: BR BRINI1 ; ; Simple Bootstrap for DRJOB(DR(V)-11(C)) ; MOV #DRCSR,R1 ;status MOV #DRCSR+2,R2 ;output buffer TST 4(R1) ;dump input=RECEIV BUFF ; ; Transmit: INIT(=4),BOOT(=10) ; MOV #4,R0 ;INIT R0 1$: MOV R0,(R2) ;TRANSMIT R0 2$: TSTB (R1) ;READY? BPL 2$ ASL R0 ;CHARS IN R0: 4,10,20 BIC #20,R0 ;IF (R0=20) R0=0 BNE 1$ ; ; READ 1st block(=nr. 0) into low memory ; MOV #1000,R3 3$: TST (R1) ;RECEIV. READY BPL 3$ MOV 4(R1),(R3)+ ;PUSH INTO MEM. CMP #2000,R3 BHI 3$ JMP @#1000 ;Execute BOOT prog. ; (INT=1,2,3 only) ;--------------------------- DL ----------------------------; DLSTRT: MOV PC,R5 ;Set up return BRINI3: BR BRINI2 ; Simple Bootstrap for TU58 emulator = DDJOB ; (BREAK procedure omitted from original) ; h.h. jun-81 MOV #DLCSR,R1 MOV #DLCSR+4,R2 TST 2(R1) ;DUMP RECEIVER BUFFER ; ; Transmit: INIT(=4),BOOT(=10),UNIT NR.(=0) ; MOV #2,R0 ;INIT R0 1$: ASL R0 ;CHARS IN R0: 4,10,20 BIC #20,R0 ;IF (R0=20) R0=0 MOV R0,2(R2) ;TRANSMIT R0 2$: TSTB (R2) ;READY? BPL 2$ TST R0 ;TEST 0-CHAR BNE 1$ ; ; READ 1st block(=nr. 0) into low memory ; CLR R3 3$: TSTB (R1) ;RECEIV. READY BPL 3$ MOVB 2(R1),(R3)+ ;PUSH BYTE IN MEM. CMP #1000,R3 BHI 3$ CLR PC ; .END START