Source Code

002444,000001: # Copyright 2004 Ronald S. Burkey <info@sandroid.org> 002445,000002: # 002446,000003: # This file is part of yaAGC. 002447,000004: 002448,000005: # yaAGC is free software; you can redistribute it and/or modify 002449,000006: # it under the terms of the GNU General Public License as published by 002450,000007: # the Free Software Foundation; either version 2 of the License, or 002451,000008: # (at your option) any later version. 002452,000009: 002453,000010: # yaAGC is distributed in the hope that it will be useful, 002454,000011: # but WITHOUT ANY WARRANTY; without even the implied warranty of 002455,000012: # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 002456,000013: # GNU General Public License for more details. 002457,000014: 002458,000015: # You should have received a copy of the GNU General Public License 002459,000016: # along with yaAGC; if not, write to the Free Software 002460,000017: # Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 002461,000018: 002462,000019: # Filename: ValidateDV.agc 002463,000020: # Purpose: This is the part of the Validation program that validates 002464,000021: # just the DV instruction. 002465,000022: # Mod history: 07/05/04 RSB. Began. 002466,000023: # 09/11/16 MAS. Added eight checks for 0 divided by a number 002467,000024: 002468,000025: 7176 24061 INCR ERRNUM 002469,000026: 002470,000027: # Check some corner corner cases discovered by NASSP 002471,000028: 002472,000029: 7177 24062 INCR ERRSUB # 1 002473,000030: 7200 37636 CA TWO 002474,000031: 7201 54063 TS TEMPI 002475,000032: 7202 30007 CA ZEROES # Check +0+0 / +2 = +0, +0 002476,000033: 7203 54001 TS L 002477,000034: 7204 00006 EXTEND 002478,000035: 7205 10063 DV TEMPI 002479,000036: 7206 10000 CCS A # Check that A is +0 002480,000037: 7207 17362 TCF DVERR 002481,000038: 7210 17213 TCF DV1LCHK 002482,000039: 7211 17362 TCF DVERR 002483,000040: 7212 17362 TCF DVERR 002484,000041: 7213 10001 DV1LCHK CCS L # Check that L is +0 002485,000042: 7214 17362 TCF DVERR 002486,000043: 7215 17220 TCF DV2 002487,000044: 7216 17362 TCF DVERR 002488,000045: 7217 17362 TCF DVERR 002489,000046: 002490,000047: 7220 24062 DV2 INCR ERRSUB # 2 002491,000048: 7221 37630 CA NEGZERO # Check that -0+0 / +2 = +0, +0 002492,000049: 7222 00006 EXTEND 002493,000050: 7223 10063 DV TEMPI 002494,000051: 7224 10000 CCS A # Check that A is +0 002495,000052: 7225 17362 TCF DVERR 002496,000053: 7226 17231 TCF DV2LCHK 002497,000054: 7227 17362 TCF DVERR 002498,000055: 7230 17362 TCF DVERR 002499,000056: 7231 10001 DV2LCHK CCS L # Check that L is +0 002500,000057: 7232 17362 TCF DVERR 002501,000058: 7233 17236 TCF DV3 002502,000059: 7234 17362 TCF DVERR 002503,000060: 7235 17362 TCF DVERR 002504,000061: 002505,000062: 7236 24062 DV3 INCR ERRSUB # 3 002506,000063: 7237 37630 CA NEGZERO # Check that +0-0 / +2 = -0, -0 002507,000064: 7240 54001 TS L 002508,000065: 7241 30007 CA ZEROES 002509,000066: 7242 00006 EXTEND 002510,000067: 7243 10063 DV TEMPI 002511,000068: 7244 10000 CCS A # Check that A is -0 002512,000069: 7245 17362 TCF DVERR 002513,000070: 7246 17362 TCF DVERR 002514,000071: 7247 17362 TCF DVERR 002515,000072: 7250 10001 DV3LCHK CCS L # Check that L is -0 002516,000073: 7251 17362 TCF DVERR 002517,000074: 7252 17362 TCF DVERR 002518,000075: 7253 17362 TCF DVERR 002519,000076: 002520,000077: 7254 24062 DV4 INCR ERRSUB # 4 002521,000078: 7255 37630 CA NEGZERO # Check that -0-0 / +2 = -0, -0 002522,000079: 7256 00006 EXTEND 002523,000080: 7257 10063 DV TEMPI 002524,000081: 7260 10000 CCS A # Check that A is -0 002525,000082: 7261 17362 TCF DVERR 002526,000083: 7262 17362 TCF DVERR 002527,000084: 7263 17362 TCF DVERR 002528,000085: 7264 10001 DV4LCHK CCS L # Check that L is -0 002529,000086: 7265 17362 TCF DVERR 002530,000087: 7266 17362 TCF DVERR 002531,000088: 7267 17362 TCF DVERR 002532,000089: 002533,000090: 7270 37632 DV5 CA NEGTWO 002534,000091: 7271 54063 TS TEMPI 002535,000092: 7272 24062 INCR ERRSUB # 5 002536,000093: 7273 30007 CA ZEROES # Check that +0+0 / -2 = -0, +0 002537,000094: 7274 54001 TS L 002538,000095: 7275 00006 EXTEND 002539,000096: 7276 10063 DV TEMPI 002540,000097: 7277 10000 CCS A # Check that A is -0 002541,000098: 7300 17362 TCF DVERR 002542,000099: 7301 17362 TCF DVERR 002543,000100: 7302 17362 TCF DVERR 002544,000101: 7303 10001 DV5LCHK CCS L # Check that L is +0 002545,000102: 7304 17362 TCF DVERR 002546,000103: 7305 17310 TCF DV6 002547,000104: 7306 17362 TCF DVERR 002548,000105: 7307 17362 TCF DVERR 002549,000106: 002550,000107: 7310 24062 DV6 INCR ERRSUB # 6 002551,000108: 7311 37630 CA NEGZERO # Check that -0+0 / -2 = -0, +0 002552,000109: 7312 00006 EXTEND 002553,000110: 7313 10063 DV TEMPI 002554,000111: 7314 10000 CCS A # Check that A is -0 002555,000112: 7315 17362 TCF DVERR 002556,000113: 7316 17362 TCF DVERR 002557,000114: 7317 17362 TCF DVERR 002558,000115: 7320 10001 DV6LCHK CCS L # Check that L is +0 002559,000116: 7321 17362 TCF DVERR 002560,000117: 7322 17325 TCF DV7 002561,000118: 7323 17362 TCF DVERR 002562,000119: 7324 17362 TCF DVERR 002563,000120: 002564,000121: 7325 24062 DV7 INCR ERRSUB # 7 002565,000122: 7326 37630 CA NEGZERO # Check that +0-0 / -2 = +0, -0 002566,000123: 7327 54001 TS L 002567,000124: 7330 30007 CA ZEROES 002568,000125: 7331 00006 EXTEND 002569,000126: 7332 10063 DV TEMPI 002570,000127: 7333 10000 CCS A # Check that A is +0 002571,000128: 7334 17362 TCF DVERR 002572,000129: 7335 17340 TCF DV7LCHK 002573,000130: 7336 17362 TCF DVERR 002574,000131: 7337 17362 TCF DVERR 002575,000132: 7340 10001 DV7LCHK CCS L # Check that L is -0 002576,000133: 7341 17362 TCF DVERR 002577,000134: 7342 17362 TCF DVERR 002578,000135: 7343 17362 TCF DVERR 002579,000136: 002580,000137: 7344 24062 DV8 INCR ERRSUB # 8 002581,000138: 7345 37630 CA NEGZERO # Check that -0-0 / -2 = +0, -0 002582,000139: 7346 00006 EXTEND 002583,000140: 7347 10063 DV TEMPI 002584,000141: 7350 10000 CCS A # Check that A is +0 002585,000142: 7351 17362 TCF DVERR 002586,000143: 7352 17355 TCF DV8LCHK 002587,000144: 7353 17362 TCF DVERR 002588,000145: 7354 17362 TCF DVERR 002589,000146: 7355 10001 DV8LCHK CCS L # Check that L is -0 002590,000147: 7356 17362 TCF DVERR 002591,000148: 7357 17362 TCF DVERR 002592,000149: 7360 17362 TCF DVERR 002593,000150: 002594,000151: 7361 17363 TCF +2 002595,000152: 7362 07437 DVERR TC ERRORDSP 002596,000153: 7363 30007 CA ZEROES 002597,000154: 7364 54062 TS ERRSUB 002598,000155: End of include-file ValidateDV.agc. Parent file is Validation.agc